(1)
Create an ALU step by step by following ALU Design instructions.
The ALU unit is composed of the combinational circuit ALU, two 16 bit input registers Xreg, Yreg and Z with a separate 16 bit Buffer Zb
(mainly for debugging purposes).
(2)Wire the machine instruction ADD as follows:
(2a) At the subcycle 3, SC3, the 16 bit datum in the memory at the address pointed by the operand
is read to MBR, Memory Buffer Register. It is exactly same as the circuit for LDG&SC3.
(2b) At the subcycle 4, SC4, the content of MBR is to be copied into Xreg register in the ALU.
The wiring for the SEND line of MBR is exactly same as one for the first part of LDG&SC4.
(2c) At the subcycle 5, SC5, the content of Greg is to be copied into Yreg register in the ALU.
(2d) At the subcycle 6, SC6, the result of ADD operation is to be stored into Z register in the ALU.
(2e) At the subcycle 7, SC7, the content of Z register is to be copied in the Greg, completing the ADD operation.
(3) In order to check your wiring of ALU and the machine instruction ADD, store manually the following test program in RAM.
The program also rechecks the circuits of the previous CAPC processor.
