CAPC Processor Project Presentation 2005

CAPC Processor is a 16 bit processor with main memory (RAM) of size 4,096 words, 16 bits per word. It was designed/built in LogicWorks4 for COMP212 Course (Computer Design and Architecture II) at Capilano College in the Spring2002 term. The CAPC Processor project (design/build the Processor) has been the major part of this course. This is the CAPC Processor Presentation 2005 Web site.

Instructor's Notes

 Scott Peerenboom
 TeJay Lee
 Nick Alcock
 Serge Lansiquot
 Rouzbeh Youssefi
 Erif Setiadi
 Jeremy Peterson
 Jeffry Anthony
 Ted Hill

Intstructor:
Dr. Minoru Hasegawa
Department of Computing Science
Capilano College
North Vancouver, BC, Canada