(1) Enhanced PC and Skeletal Processor
Consider a design of the Fetch cycle (of our CAPC processor) in LogicWorks 4/5 as follows:
At the first subcycle SC0, the processor assigns (copies) the address of the machine instruction from PC, Program Counter, to MAR, Memory Address Register, and then, at the second subcycle SC1, increments one itself (PC+1->PC). Our implementation, called Skeletal Processor, is given below:

(1a) Draw a detailed circuit of the enhance PC, pca1 in the above design sheet.